TSMC (Taiwan Semiconductor Manufacturing Company) has announced plans to begin mass production of its CoW-SoW (Chip-on-Wafer, System-on-Wafer) packaging technology by 2027. This new technology integrates TSMC's existing InFO-SoW (Integrated Fan-Out, System-on-Wafer) with SoIC (System on Integrated Chips), allowing the stacking of memory and logic chips directly on wafers. The advancement is driven by the growing demand for more powerful AI chips and the need for higher HBM (High Bandwidth Memory) integration.

TSMC to Begin Mass Production of CoW-SoW Packaging Technology by 2027-3CGO

InFO-SoW has already been used in cutting-edge AI processors like Cerebras AI chips and Tesla’s Dojo supercomputer, where TSMC's fan-out packaging technology reduced chip thickness by 20%, lowered costs by 30%, and cut interconnect power consumption by 15%. This facilitates faster, lower-power data movement, key for AI systems.

While InFO-SoW is limited in integrating chips made with different processes, CoW-SoW overcomes this, offering improved integration between logic and memory chips. TSMC claims CoW-SoW increases interconnect bandwidth, expands wafer area by up to 40 times, and boosts HBM capacity by 60 times, supporting the development of mega AI chips and large-scale data center solutions. This advancement could revolutionize chip design for AI and large-scale computing in the coming years.